RISCBoy is an open-source portable games console, designed from scratch

RISCBoy is an open-source portable games console designed from scratch, featuring a RISC-V CPU and custom graphics pipeline. It reimagines the classic Gameboy Advance era with modern open-source hardware technologies.
RISCBoy is an open-source portable games console, designed from scratch. This includes:
- A RISC-V compatible CPU
- A raster graphics pipeline and display controller
- Other chip infrastructure: busfabric, memory controllers, UART, GPIO etc.
- A PCB layout in KiCad
It is a Gameboy Advance from a parallel universe where RISC-V existed in 2001. A love letter to the handheld consoles from my childhood, and a 3AM drunk text to the technology that powered them.
The design is written in synthesisable Verilog 2005, and is intended to fit onto an iCE40-HX8k FPGA. This is a LUT4-based FPGA with 7680 logic elements, so fitting a 32 bit games console requires a crowbar and some vaseline, or perhaps just careful design. The HX8k was once the largest FPGA targeted by the open-source Icestorm FPGA toolchain, but that toolchain has since moved on to greater things.
More detailed information can be found in the documentation.
The processor supports the RV32IMC instruction set, and passes the RISC-V compliance suite for these instructions, as well as the riscv-formal verification suite, and some of my own formal property checks for instruction frontend consistency and basic bus compliance. It also supports M-mode CSRs, exceptions, and a simple compliant extension for vectored external interrupts.
This repository uses submodules for HDL as well as tests
git clone --recursive https://github.com/Wren6991/RISCBoy.git riscboy
Alternatively
git clone https://github.com/Wren6991/RISCBoy.git riscboy
cd riscboy
git submodule update --init --recursive
Note a recursive submodule update is required to run the processor's standalone tests. This is not necessary for building RISCBoy gateware.
The RV32IMC toolchain is required for compilation of software-based tests. Follow the instructions on the RISC-V GNU Toolchain GitHub, except for the configure line:
# Prerequisites for Ubuntu 20.04
sudo apt install -y autoconf automake autotools-dev curl python3 libmpc-dev libmpfr-dev libgmp-dev gawk build-essential bison flex texinfo gperf libtool patchutils bc zlib1g-dev libexpat-dev
cd /tmp
git clone --recursive https://github.com/riscv/riscv-gnu-toolchain
cd riscv-gnu-toolchain
# The ./configure arguments are the most important difference
./configure --prefix=/opt/riscv --with-arch=rv32imc --with-abi=ilp32 --with-multilib-generator="rv32i-ilp32--;rv32ic-ilp32--;rv32im-ilp32--;rv32imc-ilp32--"
sudo mkdir /opt/riscv
sudo chown $(whoami) /opt/riscv
make -j $(nproc)
Source: Hacker News













