Low-Compilation-Cost Register Allocation in LLVM-Based Binary Translation

Abstract

Binary translation (BT) is a key technology for cross-ISA software execution. While LLVM provides powerful optimization capabilities, its high compilation overhead often limits its applicability in dynamic binary translation (DBT) scenarios. This research proposes a low-compilation-cost register allocation strategy tailored for LLVM-based BT systems. By optimizing the allocation process to balance execution efficiency and translation latency, the proposed method enhances the overall performance of dynamic translation, especially for compressed ISAs and resource-constrained environments.

References

Proceedings of the Fifteenth European Conference on Computer Systems(Heraklion, Greece)

*(EuroSys '20).*Association for Computing Machinery, New York, NY, USA, Article 36, 16 pages.

*Proceedings. 36th Annual IEEE/ACM International Symposium on Microarchitecture, 2003. MICRO-36.*191–201.

*2005 USENIX Annual Technical Conference (USENIX ATC 05).*USENIX Association, Anaheim, CA. https://www.usenix.org/conference/2005-usenix-annual-technical-conference/qemu-fast-and-portable-dynamic-translator

*Proceedings. IEEE 8th International Workshops on Enabling Technologies: Infrastructure for Collaborative Enterprises (WET ICE'99).*184–189.

*Benchmarking modern multiprocessors.*Ph.D. Dissertation. Princeton University. https://www.cs.princeton.edu/techreports/2010/890.pdf.

Proceedings of the 34th ACM SIGPLAN International Conference on Compiler Construction(Las Vegas, NV, USA)

*(CC '25).*Association for Computing Machinery, New York, NY, USA, 167–179.

IEEE Micro18, 2 (March 1998), 56–64.

*1996 Proceedings of International Conference on Software Maintenance.*340–349.

Computer33, 3 (2000), 60–66.

Proceedings of the International Symposium on Code Generation and Optimization: Feedback-Directed and Runtime Optimization(San Francisco, California, USA)

*(CGO '03).*IEEE Computer Society, USA, 15–24.

ReCon 2014 Conference, Montreal, Canada.

Proceedings of the 17th ACM SIGPLAN/SIGOPS International Conference on Virtual Execution Environments(Virtual, USA)

*(VEE 2021).*Association for Computing Machinery, New York, NY, USA, 165–171.

Proceedings of the 16th ACM SIGPLAN/SIGOPS International Conference on Virtual Execution Environments(Lausanne, Switzerland)

*(VEE '20).*Association for Computing Machinery, New York, NY, USA, 172–184.

*2017 IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW).*785–794.

Journal of Systems Architecture58, 8 (2012), 305–317.

2010 IEEE International Conference on Intelligent Computing and Intelligent Systems, Vol. 1. 411–415.

SIGARCH Comput. Archit. News33, 5 (dec 2005), 63–68.

Proceedings of the Tenth International Symposium on Code Generation and Optimization(San Jose, California)

*(CGO '12).*Association for Computing Machinery, New York, NY, USA, 104–113.

*ACM Trans. Archit. Code Optim.*15, 4, Article 52 (Nov. 2018), 25 pages.

IEEE Transactions on Parallel and Distributed Systems25, 3 (2014), 622–632.

*2011 International Conference on Parallel Processing.*IEEE, 226–234.

Transmeta Technical Brief(2000), 77–84.

*International Symposium on Code Generation and Optimization, 2004. CGO 2004.*75–86.

Euro-Par 2022: Parallel Processing, José Cano and Phil Trinder (Eds.). Springer International Publishing, Cham, 3–18.

Proceedings of the 28th ACM SIGPLAN Conference on Programming Language Design and Implementation(San Diego, California, USA)

*(PLDI '07).*Association for Computing Machinery, New York, NY, USA, 89–100.

IEEE Micro41, 4 (2021), 15–23.

UKUUG Linux Developer's Conference, Vol. 2002.

Proceedings of the 2012 International Conference on Compilers, Architectures and Synthesis for Embedded Systems(Tampere, Finland)

*(CASES '12).*Association for Computing Machinery, New York, NY, USA, 51–60.

*ACM Trans. Archit. Code Optim.*11, 2, Article 18 (jun 2014), 25 pages.

*7th IEEE International Symposium on Industrial Embedded Systems (SIES'12).*229–236.

Commun. ACM36, 2 (1993), 69–81.

Computer Architecture, Ana Lucia Varbanescu, Anca Molnos, and Rob van Nieuwpoort (Eds.). Springer Berlin Heidelberg, Berlin, Heidelberg, 117–138.

Advances in Computer Systems Architecture, Lynn Choi, Yunheung Paek, and Sangyeun Cho (Eds.). Springer Berlin Heidelberg, Berlin, Heidelberg, 4–15.

Advanced Parallel Processing Technologies, Chao Li, Zhenhua Li, Li Shen, Fan Wu, and Xiaoli Gong (Eds.). Springer Nature Singapore, Singapore, 310–325.

Proceedings of the Workshop on Interaction between Compilers and Computer Architectures.